The present application relates to a thin-film transistor using an oxide semiconductor, to a method of manufacturing the same, and to a display device provided with the thin-film transistor.
An active-driving-type liquid crystal display device and an active-driving-type organic electroluminescence (hereinafter simply referred to as “EL”) display device each use a thin-film transistor (TFT) as a drive element, and each cause an electric charge, which corresponds to a signal voltage for writing an image, to be held in a hold capacitor. However, when a parasitic capacitance generated in a cross region of a gate electrode and a source electrode, or of the gate electrode and a drain electrode of the thin-film transistor is large, the signal voltage may fluctuate, leading to an occurrence of image degradation.
In the organic EL display device, in particular, it is necessary to increase the hold capacitor when the parasitic capacitance is large, and a proportion of wiring etc. occupying a pixel layout is large. As a result, there is more chance of short-circuit between the wirings etc., and there rises an issue that a fabrication yield is decreased.
To address these disadvantages, an attempt has been made to reduce the parasitic capacitance formed in the cross region of the gate electrode and the source electrode or the drain electrode, in the thin-film transistor in which an oxide semiconductor such as zinc oxide (ZnO) and indium gallium zinc oxide (IGZO) is used for a channel.
For example, Japanese Unexamined Patent Application Publication No. 2007-220817 (JP2007-220817A) and J. Park et al. “Self-aligned top-gate amorphous gallium indium zinc oxide thin film transistors”, Applied Physics Letters, American Institute of Physics, 93, 053501 (2008) (Non-Patent Document 1) each disclose a self-aligned top-gate thin-film transistor. In each of the disclosed thin-film transistors, a gate electrode and a gate insulating film are formed to have the same shape on a channel region of an oxide semiconductor thin-film layer, and a region of the oxide semiconductor thin-film layer uncovered by the gate electrode and the gate insulating film is then made low in resistance to form a source-drain region. Also, R. Hayashi et al. “Improved Amorphous In—Ga—Zn—O TFTs”, SID 08 DIGEST, 42. 1, 621-624 (2008) (Non-Patent Document 2) discloses a bottom-gate thin-film transistor having a self-aligned structure, which forms a source region and a drain region in an oxide semiconductor film with a back-side exposure in which a gate electrode is utilized as a mask.